Scrolling Theory
Ok, so we have two video screens, one which will be located in bank 2 (paged in at #8000) and the other in bank 3 (#c000) which will contain roughly the same but shifted left by one pixel. And we'll scroll these using a combination of CRTC register 3 (for a 2 pixel shift) and standard address offsetting using CRTC registers 12 and 13 to perform the main scroll.
So, what does that look like in pseudo code?
Frame 1
reset CRTC register 3
select the screen at #8000
draw a shifted column of bytes at #c000 + offset + screen width
Frame 2
select the screen at #c000
draw an unshifted column at #8000 + offset + screen width
Frame 3
move the display using CRTC register 3
select the screen at #8000
draw a shifted column of bytes at #c001 + offset + screen width
Frame 4
select the screen at #c000
draw an unshifted column at #8001 + offset + screen width
Frame 5
Increment the hardware offset
reset CRTC register 3
select the screen at #8000
draw a shifted column of bytes at #c000 + offset + screen width
and then repeat from Frame 2 onwards
Note that in each case we're always writing to the unselected video memory, so that we don't need to worry about tearing.
So, what does that look like in pseudo code?
Frame 1
reset CRTC register 3
select the screen at #8000
draw a shifted column of bytes at #c000 + offset + screen width
Frame 2
select the screen at #c000
draw an unshifted column at #8000 + offset + screen width
Frame 3
move the display using CRTC register 3
select the screen at #8000
draw a shifted column of bytes at #c001 + offset + screen width
Frame 4
select the screen at #c000
draw an unshifted column at #8001 + offset + screen width
Frame 5
Increment the hardware offset
reset CRTC register 3
select the screen at #8000
draw a shifted column of bytes at #c000 + offset + screen width
and then repeat from Frame 2 onwards
Note that in each case we're always writing to the unselected video memory, so that we don't need to worry about tearing.
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